The ideal candidates should master the entire backend flow design from RTL to GDSII including synthesis, Formal Verification, Floor-planning, PnR, STA, and Physical Verification (DRC / LVS). Management positions are open as well. Qualification, skills and knowledge requirements:B.Sc. in Electrical Engineering (Electronics) / Physics / Computer Engineering - mustAt least 3 years experience in backend design of SoC - mustExperience with place & route tools and flows (Synopsys / Cadence) - mustUnderstanding of DRC and LVS – mustKnow-how in floor-planning, power grid distribution and analysis – advantageExperience with integration of mixed-signal IPs and I/O integration – advantage